睿寬智能

RuiKuan Intelligent Technology

Sapphire Product Overview

Sapphire is a high-performance low-cost SSD controller that supports PCIe Gen3, NVMe 1.3 interfaces. The Sapphire was developed with independent intellectual property rights in China and contains SM2, SM4, AES, and RSA encryption functions, as well as SHA and SM3 for signing and verification operations. Sapphire uses a leading architecture design to guarantee the outstanding sequential read/write performance and compatibility with various SLC, MLC, TLC, and 3D flash memories. The adaptive LDPC and RAID data protection mechanism within Sapphire will dramatically improve the SSD‘s working life span.

Sapphire is a perfect fit for consumer electronics, industrial computing, and other consumer applications that require client-side SSD for secure storage, hard-disk replacement, PCs, portable devices, servers, data centers, …etc.


Features

Host Interface

◇ Industry standard PCIe Revision 3.1 compliant

◇ PCIe Gen3 x4, x2 and x1 lane mode

◇ PCIe low power management, ASPM L0s, L1, L1.2, PCI PM D0-D3 state

◇ NVMe Revision 1.3

◇ Support HMB and CMB

◇ Support 1 admin + 8 IO queue

NAND Interface

◇ Supports ONFI4.0, ONFI3.1, Toggle3.0/2.0 and asynchronous interface

◇ NV-DDR3 data rate up to 800MT/s

◇ Supports 4 channel, 8CE per channel

◇ Support CE-Reduction

◇ Supports 1.2/1.8V Flash I/O

◇ Supports 1-plane, 2-plane and 4-plane operation

◇ Support both user and meta data scramble

◇ Support Flash IO voltage self-adaption

DDR Interface

◇ Support DDR3, DDR4, LPDDR3 and DDR3L device

◇ Data rate up to 2133Mbps for DDR4

Data Protection and Reliability

◇ • LDPC hardware ECC engine with hard-decision and soft-decision

◇ ECC Codeword support 2KiB

◇ Up to 32 LLR values soft decoding

◇ Re-configurable LDPC encoder

◇ On-Chip Buffer with ECC protection

◇ DDR with inline ECC protection

◇ Page/Block/Die level RAID protection

◇ Support on-the-fly RAID parity calculation

◇ RAID protection for QLC

Security

◇ Support AES256 and SM4 for real time full drive encryption

◇ SHA256 and SM3 engines

◇ HW RSA and SM2 engines

◇ True Random Number Generator(TRNG)

◇ OTP for security and H/W control/protection

◇ H/W peripheral interface disable by OTP content after programmed

Architecture

◇ 32-bit RISC CPU

◇ 64-bit SOC internal data bus

◇ Built-in power-on-reset

◇ Support automatic sleep and wake-up mechanism for power saving

◇ Built-in voltage detectors for power failure protection

◇ Supports JTAG interface, UART interface, I2C interface

◇ Supports 2 built-in temperature sensors